The present invention disclosed herein relates to an analog digital converter (ADC), and more particularly, to a Successive Approximation Register (SAR) ADC.
Recently, as a mixed-mode system is increasingly used, an ADC becomes more necessary. Especially, researches on fabricating one chip at a low price through a Complementary Metal-Oxide Semiconductor (CMOS) process in a system such as a Digital Video Disk Player (DVDP) or a Direct Broadcasting for Satellite Receiver (DRSR) are actively in progress. For this, a design technology of the ADC capable of directly processing a Radio Frequency (RF) signal becomes the biggest issue.
Various types of ADCs are suggested until now. For example, a flash
ADC, a pipeline ADC, and an SAR ADC are introduced and are used in application fields according to their characteristics. The flash ADC operates at a relatively high speed but has an area increased by 2N according to its resolution. The pipeline ADC has a fast operating characteristic and supports a high resolution but has high power consumption. The SAR ADC has low power consumption and a simple circuit configuration but operates at a relatively slow speed.